1. Home
News Story

Nuclei System Technology collaborates with Siemens to deliver RISC-V Processor Trace Encoder solution

March 4, 2024

Image courtesy of Nuclei System Technology

Nuclei System Technology has announced strategic collaboration with Siemens Digital Industries Software.

Nuclei System Technology today announces a strategic collaboration with Siemens Digital Industries Software. The companies are working on full Tessent™ Enhanced Trace Encoder solution support for Nuclei's RISC-V processor cores. The collaboration provides real-time monitoring of CPU program execution for customers choosing Nuclei System Technology's RISC-V CPU IPs. It encodes program execution(instruction tracing) and optional loading and storing of data in highly compressed formats at the SoC level, significantly enhancing production efficiency for users in complex heterogeneous designs.

Siemens' Tessent Enhanced Trace Encoder solution is part of Siemens' Tessent Embedded Analytics product line. Through this combined solution, developers can effectively trace and debug issues between chips and software, gaining accurate insights into real-time operational states based on Nuclei's RISC-V CPU IPs. The Tessent Enhanced Trace Encoder solution fully complies with the Efficient Trace(E-Trace) standard specifications set by the RISC-V Foundation Debug and Trace Working Group. It also supports debugging traces for custom instructions, providing users with a more efficient debugging tool environment that significantly enhances research and development efficiency in complex system development.

Nuclei System Technology provides a rich portfolio of RISC-V CPU IPs covering various applications from low power to high performance in areas such as 5G communication, industrial control, artificial intelligence, automotive electronics, IoT, storage, MCU, network security, etc. Nuclei's RISC-V CPU IPs are highly configurable, allowing customers to optimize configurations based on actual downstream application needs from hundreds of options. This collaboration combines RISC-V processor IP integration and debugging trace tools, further improving the efficiency of customer's chip development process.

CEO of Nuclei System Technology, Dr. Jianying Peng, said:"Nuclei System Technology's RISC-V CPU IPs adhere to the highest industry quality control standards. To enhance user experience and optimize debugging solutions in our customers' SoC designs, we need high-quality tools like the Tessent Enhanced Trace Encoder to assist our downstream customers in their development process. The availability of this tool will provide our customers with more efficient debugging and tracing solutions."

Ankur Gupta, VP and General Manager, Tessent, Siemens Digital Industries Software, said: "Siemens' Tessent Embedded Analytics tools enable real-time debugging and post-deployment analysis of the entire system, helping users produce high-quality, innovative products and rapidly bring them to market. As a leading RISC-V solution provider, Nuclei System Technology serves a large number of chip customers, and we are pleased to partner with them to jointly support the chip development goals of our mutual customers."

The collaboration between Nuclei System Technology and Siemens is expected to greatly enhance the research and development efficiency of RISC-V CPU IPs' customers, positively contributing to the advancement of the RISC-V ecosystem.

Read more on the Nuclei System Technology newsroom.